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Due in GitHub Tuesday, December 12 at 11:59pm.

Complete the following exercises from DDCA:

1. DDCA 7.30

Exercise 7.30 Using a diagram similar to Figure 7.53, show the forwarding and stalls needed to execute the following instructions on the pipelined ARM processor.

ADD R0, R4, R9
SUB R0, R0, R2
LDR R1, [R0, #60]
AND R2, R1, R0

Figure 7.53: