Timeline

Date	Topics	Materials
May 11, 2023		notes-01 video-01 notes-02 video-02
May 9, 2023	Advanced processor topics. Final Exam Review	notes-01 video-01 notes-02 video-02
May 12, 2023
May 12, 2023
May 2, 2023	Pipeline optimization, Control Hazards	notes-01 video-01 code-01 notes-02 video-02
Apr 26, 2023	Register Forwarding	notes-01 video-01 notes-02 video-02
Apr 25, 2023	Pipelining; assigned project07	notes-01 video-01 code-01
Apr 20, 2023	project06 review	notes-01 video-01 notes-02 video-02
Apr 19, 2023	Read/Modify/Write for project06 LD/ST	notes-01 video-01 notes-02 video-02
Apr 18, 2023	Memory control path, read/modify/write, assigned project06	notes-01 video-01 code-01 notes-02 video-02 code-02
Apr 13, 2023	Unconditional branch, Conditional branch, lab07 demo	notes-01 video-01 code-01 notes-02 video-02 code-02
Apr 12, 2023	Control Path, Decoder, Decode ROM	notes-01 video-01 notes-02 video-02
Apr 11, 2023	Decoding, spreadsheet technique, assigned lab07	notes-01 video-01 notes-02 video-02
Apr 6, 2023	Enabling registers, microarchitecture intro	notes-01 video-01 notes-02 video-02
Apr 5, 2023	Register File, x0, ALU, AluSrcB mux, debugging tips	video-01 code-01 notes-02 video-02 code-02
Apr 4, 2023	project05 wrap-up (encoder/decoder, unimp, enabling registers), start lab06 (register file and ALU)	notes-01 video-01 notes-02 video-02
Mar 30, 2023	Review registers and sequential logic, counters, making ROMs, bitwise equality, C analyze program	notes-01 video-01 notes-02 video-02
Mar 29, 2023	Latches and flip-flops; assigned project05	notes-01 video-01 code-01 notes-02 video-02 code-02
Mar 23, 2023	1-bit full adder, max2, 4-bit ripple carry adder	notes-01 video-01 code-01 notes-02 code-02
Mar 22, 2023	Intro to Digital Design. Assigned lab05	notes-01 video-01 code-01 notes-02 video-02 code-02
Mar 21, 2023	Project04 review, first half review	notes-01 video-01 notes-02 video-02
Mar 9, 2023	Direct-mapped and Set Associative Caching	notes-01 video-01 notes-02 video-02
Mar 8, 2023	Emulating RISC-V load and store	notes-02 video-02
Mar 7, 2023	RISC-V emulation. Instruction formats, branch targets, objdump. Assigned project04	notes-01 video-01 notes-02 video-02
Mar 1, 2023	RISC-V emulation. Pseudo-instructions, immediates, demo code	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 28, 2023	RISC-V machine code; assigned lab04	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 23, 2023	Merge sort review. Array shift sample code	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 22, 2023	Using bitwise AND and OR to manipulate numbers, merge sort strategies	notes-01 video-01 notes-02 video-02
Feb 21, 2023	Arithmetic shift, sign extension, assigned project03	notes-01 video-01 notes-02 video-02
Feb 16, 2023	Logical shift, more recursion	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 15, 2023	Pseudocode exercise, RISC-V recursion	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 14, 2023	Binary representation, 2’s complement, logical and arithmetic shift. Assigned lab03	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 9, 2023	ChatGPT critique, RISC-V memory demos, arr+1, countc	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 8, 2023	RISC-V functions, callee- and caller-preserved registers	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 7, 2023	RISC-V load and store. Assigned project02	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 2, 2023	Lab02 tips; Conditional branch	notes-01 video-01 code-01 notes-02 video-02 code-02
Feb 1, 2023	RISC-V conditional execution	notes-01 video-01 code-01 notes-02 video-02 code-02
Jan 31, 2023	Begin RISC-V assembly language (quick reference) Assigned lab02	notes-01 video-01 code-01 notes-02 video-02 code-02
Jan 26, 2023	Assigned project01 RISC-V guest setup	notes-01 video-01 notes-02 video-02
Jan 25, 2023	Lab01 base conversion algorithms	notes-01 video-01 code-01 notes-02 video-02 code-02
Jan 24, 2023	Course introduction. Assigned lab01	notes-01 video-01 notes-02 video-02